/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * This file was automatically generated by headergen, DO NOT EDIT it. * headergen version: 3.0.0 * x1000 version: 1.0 * x1000 authors: Aidan MacDonald * * Copyright (C) 2015 by the authors * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/ #ifndef __HEADERGEN_I2C_H__ #define __HEADERGEN_I2C_H__ #include "macro.h" #define REG_I2C_CON(_n1) jz_reg(I2C_CON(_n1)) #define JA_I2C_CON(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x0) #define JT_I2C_CON(_n1) JIO_32_RW #define JN_I2C_CON(_n1) I2C_CON #define JI_I2C_CON(_n1) (_n1) #define BP_I2C_CON_SPEED 1 #define BM_I2C_CON_SPEED 0x6 #define BV_I2C_CON_SPEED__100K 0x1 #define BV_I2C_CON_SPEED__400K 0x2 #define BF_I2C_CON_SPEED(v) (((v) & 0x3) << 1) #define BFM_I2C_CON_SPEED(v) BM_I2C_CON_SPEED #define BF_I2C_CON_SPEED_V(e) BF_I2C_CON_SPEED(BV_I2C_CON_SPEED__##e) #define BFM_I2C_CON_SPEED_V(v) BM_I2C_CON_SPEED #define BP_I2C_CON_SLVDIS 6 #define BM_I2C_CON_SLVDIS 0x40 #define BF_I2C_CON_SLVDIS(v) (((v) & 0x1) << 6) #define BFM_I2C_CON_SLVDIS(v) BM_I2C_CON_SLVDIS #define BF_I2C_CON_SLVDIS_V(e) BF_I2C_CON_SLVDIS(BV_I2C_CON_SLVDIS__##e) #define BFM_I2C_CON_SLVDIS_V(v) BM_I2C_CON_SLVDIS #define BP_I2C_CON_RESTART 5 #define BM_I2C_CON_RESTART 0x20 #define BF_I2C_CON_RESTART(v) (((v) & 0x1) << 5) #define BFM_I2C_CON_RESTART(v) BM_I2C_CON_RESTART #define BF_I2C_CON_RESTART_V(e) BF_I2C_CON_RESTART(BV_I2C_CON_RESTART__##e) #define BFM_I2C_CON_RESTART_V(v) BM_I2C_CON_RESTART #define BP_I2C_CON_MATP 4 #define BM_I2C_CON_MATP 0x10 #define BF_I2C_CON_MATP(v) (((v) & 0x1) << 4) #define BFM_I2C_CON_MATP(v) BM_I2C_CON_MATP #define BF_I2C_CON_MATP_V(e) BF_I2C_CON_MATP(BV_I2C_CON_MATP__##e) #define BFM_I2C_CON_MATP_V(v) BM_I2C_CON_MATP #define BP_I2C_CON_SATP 3 #define BM_I2C_CON_SATP 0x8 #define BF_I2C_CON_SATP(v) (((v) & 0x1) << 3) #define BFM_I2C_CON_SATP(v) BM_I2C_CON_SATP #define BF_I2C_CON_SATP_V(e) BF_I2C_CON_SATP(BV_I2C_CON_SATP__##e) #define BFM_I2C_CON_SATP_V(v) BM_I2C_CON_SATP #define BP_I2C_CON_MD 0 #define BM_I2C_CON_MD 0x1 #define BF_I2C_CON_MD(v) (((v) & 0x1) << 0) #define BFM_I2C_CON_MD(v) BM_I2C_CON_MD #define BF_I2C_CON_MD_V(e) BF_I2C_CON_MD(BV_I2C_CON_MD__##e) #define BFM_I2C_CON_MD_V(v) BM_I2C_CON_MD #define REG_I2C_DC(_n1) jz_reg(I2C_DC(_n1)) #define JA_I2C_DC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x10) #define JT_I2C_DC(_n1) JIO_32_RW #define JN_I2C_DC(_n1) I2C_DC #define JI_I2C_DC(_n1) (_n1) #define BP_I2C_DC_DAT 0 #define BM_I2C_DC_DAT 0xff #define BF_I2C_DC_DAT(v) (((v) & 0xff) << 0) #define BFM_I2C_DC_DAT(v) BM_I2C_DC_DAT #define BF_I2C_DC_DAT_V(e) BF_I2C_DC_DAT(BV_I2C_DC_DAT__##e) #define BFM_I2C_DC_DAT_V(v) BM_I2C_DC_DAT #define BP_I2C_DC_RESTART 10 #define BM_I2C_DC_RESTART 0x400 #define BF_I2C_DC_RESTART(v) (((v) & 0x1) << 10) #define BFM_I2C_DC_RESTART(v) BM_I2C_DC_RESTART #define BF_I2C_DC_RESTART_V(e) BF_I2C_DC_RESTART(BV_I2C_DC_RESTART__##e) #define BFM_I2C_DC_RESTART_V(v) BM_I2C_DC_RESTART #define BP_I2C_DC_STOP 9 #define BM_I2C_DC_STOP 0x200 #define BF_I2C_DC_STOP(v) (((v) & 0x1) << 9) #define BFM_I2C_DC_STOP(v) BM_I2C_DC_STOP #define BF_I2C_DC_STOP_V(e) BF_I2C_DC_STOP(BV_I2C_DC_STOP__##e) #define BFM_I2C_DC_STOP_V(v) BM_I2C_DC_STOP #define BP_I2C_DC_CMD 8 #define BM_I2C_DC_CMD 0x100 #define BF_I2C_DC_CMD(v) (((v) & 0x1) << 8) #define BFM_I2C_DC_CMD(v) BM_I2C_DC_CMD #define BF_I2C_DC_CMD_V(e) BF_I2C_DC_CMD(BV_I2C_DC_CMD__##e) #define BFM_I2C_DC_CMD_V(v) BM_I2C_DC_CMD #define REG_I2C_INTST(_n1) jz_reg(I2C_INTST(_n1)) #define JA_I2C_INTST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x2c) #define JT_I2C_INTST(_n1) JIO_32_RW #define JN_I2C_INTST(_n1) I2C_INTST #define JI_I2C_INTST(_n1) (_n1) #define BP_I2C_INTST_GC 11 #define BM_I2C_INTST_GC 0x800 #define BF_I2C_INTST_GC(v) (((v) & 0x1) << 11) #define BFM_I2C_INTST_GC(v) BM_I2C_INTST_GC #define BF_I2C_INTST_GC_V(e) BF_I2C_INTST_GC(BV_I2C_INTST_GC__##e) #define BFM_I2C_INTST_GC_V(v) BM_I2C_INTST_GC #define BP_I2C_INTST_STT 10 #define BM_I2C_INTST_STT 0x400 #define BF_I2C_INTST_STT(v) (((v) & 0x1) << 10) #define BFM_I2C_INTST_STT(v) BM_I2C_INTST_STT #define BF_I2C_INTST_STT_V(e) BF_I2C_INTST_STT(BV_I2C_INTST_STT__##e) #define BFM_I2C_INTST_STT_V(v) BM_I2C_INTST_STT #define BP_I2C_INTST_STP 9 #define BM_I2C_INTST_STP 0x200 #define BF_I2C_INTST_STP(v) (((v) & 0x1) << 9) #define BFM_I2C_INTST_STP(v) BM_I2C_INTST_STP #define BF_I2C_INTST_STP_V(e) BF_I2C_INTST_STP(BV_I2C_INTST_STP__##e) #define BFM_I2C_INTST_STP_V(v) BM_I2C_INTST_STP #define BP_I2C_INTST_ACT 8 #define BM_I2C_INTST_ACT 0x100 #define BF_I2C_INTST_ACT(v) (((v) & 0x1) << 8) #define BFM_I2C_INTST_ACT(v) BM_I2C_INTST_ACT #define BF_I2C_INTST_ACT_V(e) BF_I2C_INTST_ACT(BV_I2C_INTST_ACT__##e) #define BFM_I2C_INTST_ACT_V(v) BM_I2C_INTST_ACT #define BP_I2C_INTST_RXDN 7 #define BM_I2C_INTST_RXDN 0x80 #define BF_I2C_INTST_RXDN(v) (((v) & 0x1) << 7) #define BFM_I2C_INTST_RXDN(v) BM_I2C_INTST_RXDN #define BF_I2C_INTST_RXDN_V(e) BF_I2C_INTST_RXDN(BV_I2C_INTST_RXDN__##e) #define BFM_I2C_INTST_RXDN_V(v) BM_I2C_INTST_RXDN #define BP_I2C_INTST_TXABT 6 #define BM_I2C_INTST_TXABT 0x40 #define BF_I2C_INTST_TXABT(v) (((v) & 0x1) << 6) #define BFM_I2C_INTST_TXABT(v) BM_I2C_INTST_TXABT #define BF_I2C_INTST_TXABT_V(e) BF_I2C_INTST_TXABT(BV_I2C_INTST_TXABT__##e) #define BFM_I2C_INTST_TXABT_V(v) BM_I2C_INTST_TXABT #define BP_I2C_INTST_RDREQ 5 #define BM_I2C_INTST_RDREQ 0x20 #define BF_I2C_INTST_RDREQ(v) (((v) & 0x1) << 5) #define BFM_I2C_INTST_RDREQ(v) BM_I2C_INTST_RDREQ #define BF_I2C_INTST_RDREQ_V(e) BF_I2C_INTST_RDREQ(BV_I2C_INTST_RDREQ__##e) #define BFM_I2C_INTST_RDREQ_V(v) BM_I2C_INTST_RDREQ #define BP_I2C_INTST_TXEMP 4 #define BM_I2C_INTST_TXEMP 0x10 #define BF_I2C_INTST_TXEMP(v) (((v) & 0x1) << 4) #define BFM_I2C_INTST_TXEMP(v) BM_I2C_INTST_TXEMP #define BF_I2C_INTST_TXEMP_V(e) BF_I2C_INTST_TXEMP(BV_I2C_INTST_TXEMP__##e) #define BFM_I2C_INTST_TXEMP_V(v) BM_I2C_INTST_TXEMP #define BP_I2C_INTST_TXOF 3 #define BM_I2C_INTST_TXOF 0x8 #define BF_I2C_INTST_TXOF(v) (((v) & 0x1) << 3) #define BFM_I2C_INTST_TXOF(v) BM_I2C_INTST_TXOF #define BF_I2C_INTST_TXOF_V(e) BF_I2C_INTST_TXOF(BV_I2C_INTST_TXOF__##e) #define BFM_I2C_INTST_TXOF_V(v) BM_I2C_INTST_TXOF #define BP_I2C_INTST_RXFL 2 #define BM_I2C_INTST_RXFL 0x4 #define BF_I2C_INTST_RXFL(v) (((v) & 0x1) << 2) #define BFM_I2C_INTST_RXFL(v) BM_I2C_INTST_RXFL #define BF_I2C_INTST_RXFL_V(e) BF_I2C_INTST_RXFL(BV_I2C_INTST_RXFL__##e) #define BFM_I2C_INTST_RXFL_V(v) BM_I2C_INTST_RXFL #define BP_I2C_INTST_RXOF 1 #define BM_I2C_INTST_RXOF 0x2 #define BF_I2C_INTST_RXOF(v) (((v) & 0x1) << 1) #define BFM_I2C_INTST_RXOF(v) BM_I2C_INTST_RXOF #define BF_I2C_INTST_RXOF_V(e) BF_I2C_INTST_RXOF(BV_I2C_INTST_RXOF__##e) #define BFM_I2C_INTST_RXOF_V(v) BM_I2C_INTST_RXOF #define BP_I2C_INTST_RXUF 0 #define BM_I2C_INTST_RXUF 0x1 #define BF_I2C_INTST_RXUF(v) (((v) & 0x1) << 0) #define BFM_I2C_INTST_RXUF(v) BM_I2C_INTST_RXUF #define BF_I2C_INTST_RXUF_V(e) BF_I2C_INTST_RXUF(BV_I2C_INTST_RXUF__##e) #define BFM_I2C_INTST_RXUF_V(v) BM_I2C_INTST_RXUF #define REG_I2C_INTMSK(_n1) jz_reg(I2C_INTMSK(_n1)) #define JA_I2C_INTMSK(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x30) #define JT_I2C_INTMSK(_n1) JIO_32_RW #define JN_I2C_INTMSK(_n1) I2C_INTMSK #define JI_I2C_INTMSK(_n1) (_n1) #define BP_I2C_INTMSK_GC 11 #define BM_I2C_INTMSK_GC 0x800 #define BF_I2C_INTMSK_GC(v) (((v) & 0x1) << 11) #define BFM_I2C_INTMSK_GC(v) BM_I2C_INTMSK_GC #define BF_I2C_INTMSK_GC_V(e) BF_I2C_INTMSK_GC(BV_I2C_INTMSK_GC__##e) #define BFM_I2C_INTMSK_GC_V(v) BM_I2C_INTMSK_GC #define BP_I2C_INTMSK_STT 10 #define BM_I2C_INTMSK_STT 0x400 #define BF_I2C_INTMSK_STT(v) (((v) & 0x1) << 10) #define BFM_I2C_INTMSK_STT(v) BM_I2C_INTMSK_STT #define BF_I2C_INTMSK_STT_V(e) BF_I2C_INTMSK_STT(BV_I2C_INTMSK_STT__##e) #define BFM_I2C_INTMSK_STT_V(v) BM_I2C_INTMSK_STT #define BP_I2C_INTMSK_STP 9 #define BM_I2C_INTMSK_STP 0x200 #define BF_I2C_INTMSK_STP(v) (((v) & 0x1) << 9) #define BFM_I2C_INTMSK_STP(v) BM_I2C_INTMSK_STP #define BF_I2C_INTMSK_STP_V(e) BF_I2C_INTMSK_STP(BV_I2C_INTMSK_STP__##e) #define BFM_I2C_INTMSK_STP_V(v) BM_I2C_INTMSK_STP #define BP_I2C_INTMSK_ACT 8 #define BM_I2C_INTMSK_ACT 0x100 #define BF_I2C_INTMSK_ACT(v) (((v) & 0x1) << 8) #define BFM_I2C_INTMSK_ACT(v) BM_I2C_INTMSK_ACT #define BF_I2C_INTMSK_ACT_V(e) BF_I2C_INTMSK_ACT(BV_I2C_INTMSK_ACT__##e) #define BFM_I2C_INTMSK_ACT_V(v) BM_I2C_INTMSK_ACT #define BP_I2C_INTMSK_RXDN 7 #define BM_I2C_INTMSK_RXDN 0x80 #define BF_I2C_INTMSK_RXDN(v) (((v) & 0x1) << 7) #define BFM_I2C_INTMSK_RXDN(v) BM_I2C_INTMSK_RXDN #define BF_I2C_INTMSK_RXDN_V(e) BF_I2C_INTMSK_RXDN(BV_I2C_INTMSK_RXDN__##e) #define BFM_I2C_INTMSK_RXDN_V(v) BM_I2C_INTMSK_RXDN #define BP_I2C_INTMSK_TXABT 6 #define BM_I2C_INTMSK_TXABT 0x40 #define BF_I2C_INTMSK_TXABT(v) (((v) & 0x1) << 6) #define BFM_I2C_INTMSK_TXABT(v) BM_I2C_INTMSK_TXABT #define BF_I2C_INTMSK_TXABT_V(e) BF_I2C_INTMSK_TXABT(BV_I2C_INTMSK_TXABT__##e) #define BFM_I2C_INTMSK_TXABT_V(v) BM_I2C_INTMSK_TXABT #define BP_I2C_INTMSK_RDREQ 5 #define BM_I2C_INTMSK_RDREQ 0x20 #define BF_I2C_INTMSK_RDREQ(v) (((v) & 0x1) << 5) #define BFM_I2C_INTMSK_RDREQ(v) BM_I2C_INTMSK_RDREQ #define BF_I2C_INTMSK_RDREQ_V(e) BF_I2C_INTMSK_RDREQ(BV_I2C_INTMSK_RDREQ__##e) #define BFM_I2C_INTMSK_RDREQ_V(v) BM_I2C_INTMSK_RDREQ #define BP_I2C_INTMSK_TXEMP 4 #define BM_I2C_INTMSK_TXEMP 0x10 #define BF_I2C_INTMSK_TXEMP(v) (((v) & 0x1) << 4) #define BFM_I2C_INTMSK_TXEMP(v) BM_I2C_INTMSK_TXEMP #define BF_I2C_INTMSK_TXEMP_V(e) BF_I2C_INTMSK_TXEMP(BV_I2C_INTMSK_TXEMP__##e) #define BFM_I2C_INTMSK_TXEMP_V(v) BM_I2C_INTMSK_TXEMP #define BP_I2C_INTMSK_TXOF 3 #define BM_I2C_INTMSK_TXOF 0x8 #define BF_I2C_INTMSK_TXOF(v) (((v) & 0x1) << 3) #define BFM_I2C_INTMSK_TXOF(v) BM_I2C_INTMSK_TXOF #define BF_I2C_INTMSK_TXOF_V(e) BF_I2C_INTMSK_TXOF(BV_I2C_INTMSK_TXOF__##e) #define BFM_I2C_INTMSK_TXOF_V(v) BM_I2C_INTMSK_TXOF #define BP_I2C_INTMSK_RXFL 2 #define BM_I2C_INTMSK_RXFL 0x4 #define BF_I2C_INTMSK_RXFL(v) (((v) & 0x1) << 2) #define BFM_I2C_INTMSK_RXFL(v) BM_I2C_INTMSK_RXFL #define BF_I2C_INTMSK_RXFL_V(e) BF_I2C_INTMSK_RXFL(BV_I2C_INTMSK_RXFL__##e) #define BFM_I2C_INTMSK_RXFL_V(v) BM_I2C_INTMSK_RXFL #define BP_I2C_INTMSK_RXOF 1 #define BM_I2C_INTMSK_RXOF 0x2 #define BF_I2C_INTMSK_RXOF(v) (((v) & 0x1) << 1) #define BFM_I2C_INTMSK_RXOF(v) BM_I2C_INTMSK_RXOF #define BF_I2C_INTMSK_RXOF_V(e) BF_I2C_INTMSK_RXOF(BV_I2C_INTMSK_RXOF__##e) #define BFM_I2C_INTMSK_RXOF_V(v) BM_I2C_INTMSK_RXOF #define BP_I2C_INTMSK_RXUF 0 #define BM_I2C_INTMSK_RXUF 0x1 #define BF_I2C_INTMSK_RXUF(v) (((v) & 0x1) << 0) #define BFM_I2C_INTMSK_RXUF(v) BM_I2C_INTMSK_RXUF #define BF_I2C_INTMSK_RXUF_V(e) BF_I2C_INTMSK_RXUF(BV_I2C_INTMSK_RXUF__##e) #define BFM_I2C_INTMSK_RXUF_V(v) BM_I2C_INTMSK_RXUF #define REG_I2C_RINTST(_n1) jz_reg(I2C_RINTST(_n1)) #define JA_I2C_RINTST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x34) #define JT_I2C_RINTST(_n1) JIO_32_RW #define JN_I2C_RINTST(_n1) I2C_RINTST #define JI_I2C_RINTST(_n1) (_n1) #define BP_I2C_RINTST_GC 11 #define BM_I2C_RINTST_GC 0x800 #define BF_I2C_RINTST_GC(v) (((v) & 0x1) << 11) #define BFM_I2C_RINTST_GC(v) BM_I2C_RINTST_GC #define BF_I2C_RINTST_GC_V(e) BF_I2C_RINTST_GC(BV_I2C_RINTST_GC__##e) #define BFM_I2C_RINTST_GC_V(v) BM_I2C_RINTST_GC #define BP_I2C_RINTST_STT 10 #define BM_I2C_RINTST_STT 0x400 #define BF_I2C_RINTST_STT(v) (((v) & 0x1) << 10) #define BFM_I2C_RINTST_STT(v) BM_I2C_RINTST_STT #define BF_I2C_RINTST_STT_V(e) BF_I2C_RINTST_STT(BV_I2C_RINTST_STT__##e) #define BFM_I2C_RINTST_STT_V(v) BM_I2C_RINTST_STT #define BP_I2C_RINTST_STP 9 #define BM_I2C_RINTST_STP 0x200 #define BF_I2C_RINTST_STP(v) (((v) & 0x1) << 9) #define BFM_I2C_RINTST_STP(v) BM_I2C_RINTST_STP #define BF_I2C_RINTST_STP_V(e) BF_I2C_RINTST_STP(BV_I2C_RINTST_STP__##e) #define BFM_I2C_RINTST_STP_V(v) BM_I2C_RINTST_STP #define BP_I2C_RINTST_ACT 8 #define BM_I2C_RINTST_ACT 0x100 #define BF_I2C_RINTST_ACT(v) (((v) & 0x1) << 8) #define BFM_I2C_RINTST_ACT(v) BM_I2C_RINTST_ACT #define BF_I2C_RINTST_ACT_V(e) BF_I2C_RINTST_ACT(BV_I2C_RINTST_ACT__##e) #define BFM_I2C_RINTST_ACT_V(v) BM_I2C_RINTST_ACT #define BP_I2C_RINTST_RXDN 7 #define BM_I2C_RINTST_RXDN 0x80 #define BF_I2C_RINTST_RXDN(v) (((v) & 0x1) << 7) #define BFM_I2C_RINTST_RXDN(v) BM_I2C_RINTST_RXDN #define BF_I2C_RINTST_RXDN_V(e) BF_I2C_RINTST_RXDN(BV_I2C_RINTST_RXDN__##e) #define BFM_I2C_RINTST_RXDN_V(v) BM_I2C_RINTST_RXDN #define BP_I2C_RINTST_TXABT 6 #define BM_I2C_RINTST_TXABT 0x40 #define BF_I2C_RINTST_TXABT(v) (((v) & 0x1) << 6) #define BFM_I2C_RINTST_TXABT(v) BM_I2C_RINTST_TXABT #define BF_I2C_RINTST_TXABT_V(e) BF_I2C_RINTST_TXABT(BV_I2C_RINTST_TXABT__##e) #define BFM_I2C_RINTST_TXABT_V(v) BM_I2C_RINTST_TXABT #define BP_I2C_RINTST_RDREQ 5 #define BM_I2C_RINTST_RDREQ 0x20 #define BF_I2C_RINTST_RDREQ(v) (((v) & 0x1) << 5) #define BFM_I2C_RINTST_RDREQ(v) BM_I2C_RINTST_RDREQ #define BF_I2C_RINTST_RDREQ_V(e) BF_I2C_RINTST_RDREQ(BV_I2C_RINTST_RDREQ__##e) #define BFM_I2C_RINTST_RDREQ_V(v) BM_I2C_RINTST_RDREQ #define BP_I2C_RINTST_TXEMP 4 #define BM_I2C_RINTST_TXEMP 0x10 #define BF_I2C_RINTST_TXEMP(v) (((v) & 0x1) << 4) #define BFM_I2C_RINTST_TXEMP(v) BM_I2C_RINTST_TXEMP #define BF_I2C_RINTST_TXEMP_V(e) BF_I2C_RINTST_TXEMP(BV_I2C_RINTST_TXEMP__##e) #define BFM_I2C_RINTST_TXEMP_V(v) BM_I2C_RINTST_TXEMP #define BP_I2C_RINTST_TXOF 3 #define BM_I2C_RINTST_TXOF 0x8 #define BF_I2C_RINTST_TXOF(v) (((v) & 0x1) << 3) #define BFM_I2C_RINTST_TXOF(v) BM_I2C_RINTST_TXOF #define BF_I2C_RINTST_TXOF_V(e) BF_I2C_RINTST_TXOF(BV_I2C_RINTST_TXOF__##e) #define BFM_I2C_RINTST_TXOF_V(v) BM_I2C_RINTST_TXOF #define BP_I2C_RINTST_RXFL 2 #define BM_I2C_RINTST_RXFL 0x4 #define BF_I2C_RINTST_RXFL(v) (((v) & 0x1) << 2) #define BFM_I2C_RINTST_RXFL(v) BM_I2C_RINTST_RXFL #define BF_I2C_RINTST_RXFL_V(e) BF_I2C_RINTST_RXFL(BV_I2C_RINTST_RXFL__##e) #define BFM_I2C_RINTST_RXFL_V(v) BM_I2C_RINTST_RXFL #define BP_I2C_RINTST_RXOF 1 #define BM_I2C_RINTST_RXOF 0x2 #define BF_I2C_RINTST_RXOF(v) (((v) & 0x1) << 1) #define BFM_I2C_RINTST_RXOF(v) BM_I2C_RINTST_RXOF #define BF_I2C_RINTST_RXOF_V(e) BF_I2C_RINTST_RXOF(BV_I2C_RINTST_RXOF__##e) #define BFM_I2C_RINTST_RXOF_V(v) BM_I2C_RINTST_RXOF #define BP_I2C_RINTST_RXUF 0 #define BM_I2C_RINTST_RXUF 0x1 #define BF_I2C_RINTST_RXUF(v) (((v) & 0x1) << 0) #define BFM_I2C_RINTST_RXUF(v) BM_I2C_RINTST_RXUF #define BF_I2C_RINTST_RXUF_V(e) BF_I2C_RINTST_RXUF(BV_I2C_RINTST_RXUF__##e) #define BFM_I2C_RINTST_RXUF_V(v) BM_I2C_RINTST_RXUF #define REG_I2C_ENABLE(_n1) jz_reg(I2C_ENABLE(_n1)) #define JA_I2C_ENABLE(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x6c) #define JT_I2C_ENABLE(_n1) JIO_32_RW #define JN_I2C_ENABLE(_n1) I2C_ENABLE #define JI_I2C_ENABLE(_n1) (_n1) #define BP_I2C_ENABLE_ABORT 1 #define BM_I2C_ENABLE_ABORT 0x2 #define BF_I2C_ENABLE_ABORT(v) (((v) & 0x1) << 1) #define BFM_I2C_ENABLE_ABORT(v) BM_I2C_ENABLE_ABORT #define BF_I2C_ENABLE_ABORT_V(e) BF_I2C_ENABLE_ABORT(BV_I2C_ENABLE_ABORT__##e) #define BFM_I2C_ENABLE_ABORT_V(v) BM_I2C_ENABLE_ABORT #define BP_I2C_ENABLE_ACTIVE 0 #define BM_I2C_ENABLE_ACTIVE 0x1 #define BF_I2C_ENABLE_ACTIVE(v) (((v) & 0x1) << 0) #define BFM_I2C_ENABLE_ACTIVE(v) BM_I2C_ENABLE_ACTIVE #define BF_I2C_ENABLE_ACTIVE_V(e) BF_I2C_ENABLE_ACTIVE(BV_I2C_ENABLE_ACTIVE__##e) #define BFM_I2C_ENABLE_ACTIVE_V(v) BM_I2C_ENABLE_ACTIVE #define REG_I2C_STATUS(_n1) jz_reg(I2C_STATUS(_n1)) #define JA_I2C_STATUS(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x70) #define JT_I2C_STATUS(_n1) JIO_32_RW #define JN_I2C_STATUS(_n1) I2C_STATUS #define JI_I2C_STATUS(_n1) (_n1) #define BP_I2C_STATUS_SLVACT 6 #define BM_I2C_STATUS_SLVACT 0x40 #define BF_I2C_STATUS_SLVACT(v) (((v) & 0x1) << 6) #define BFM_I2C_STATUS_SLVACT(v) BM_I2C_STATUS_SLVACT #define BF_I2C_STATUS_SLVACT_V(e) BF_I2C_STATUS_SLVACT(BV_I2C_STATUS_SLVACT__##e) #define BFM_I2C_STATUS_SLVACT_V(v) BM_I2C_STATUS_SLVACT #define BP_I2C_STATUS_MSTACT 5 #define BM_I2C_STATUS_MSTACT 0x20 #define BF_I2C_STATUS_MSTACT(v) (((v) & 0x1) << 5) #define BFM_I2C_STATUS_MSTACT(v) BM_I2C_STATUS_MSTACT #define BF_I2C_STATUS_MSTACT_V(e) BF_I2C_STATUS_MSTACT(BV_I2C_STATUS_MSTACT__##e) #define BFM_I2C_STATUS_MSTACT_V(v) BM_I2C_STATUS_MSTACT #define BP_I2C_STATUS_RFF 4 #define BM_I2C_STATUS_RFF 0x10 #define BF_I2C_STATUS_RFF(v) (((v) & 0x1) << 4) #define BFM_I2C_STATUS_RFF(v) BM_I2C_STATUS_RFF #define BF_I2C_STATUS_RFF_V(e) BF_I2C_STATUS_RFF(BV_I2C_STATUS_RFF__##e) #define BFM_I2C_STATUS_RFF_V(v) BM_I2C_STATUS_RFF #define BP_I2C_STATUS_RFNE 3 #define BM_I2C_STATUS_RFNE 0x8 #define BF_I2C_STATUS_RFNE(v) (((v) & 0x1) << 3) #define BFM_I2C_STATUS_RFNE(v) BM_I2C_STATUS_RFNE #define BF_I2C_STATUS_RFNE_V(e) BF_I2C_STATUS_RFNE(BV_I2C_STATUS_RFNE__##e) #define BFM_I2C_STATUS_RFNE_V(v) BM_I2C_STATUS_RFNE #define BP_I2C_STATUS_TFE 2 #define BM_I2C_STATUS_TFE 0x4 #define BF_I2C_STATUS_TFE(v) (((v) & 0x1) << 2) #define BFM_I2C_STATUS_TFE(v) BM_I2C_STATUS_TFE #define BF_I2C_STATUS_TFE_V(e) BF_I2C_STATUS_TFE(BV_I2C_STATUS_TFE__##e) #define BFM_I2C_STATUS_TFE_V(v) BM_I2C_STATUS_TFE #define BP_I2C_STATUS_TFNF 1 #define BM_I2C_STATUS_TFNF 0x2 #define BF_I2C_STATUS_TFNF(v) (((v) & 0x1) << 1) #define BFM_I2C_STATUS_TFNF(v) BM_I2C_STATUS_TFNF #define BF_I2C_STATUS_TFNF_V(e) BF_I2C_STATUS_TFNF(BV_I2C_STATUS_TFNF__##e) #define BFM_I2C_STATUS_TFNF_V(v) BM_I2C_STATUS_TFNF #define BP_I2C_STATUS_ACT 0 #define BM_I2C_STATUS_ACT 0x1 #define BF_I2C_STATUS_ACT(v) (((v) & 0x1) << 0) #define BFM_I2C_STATUS_ACT(v) BM_I2C_STATUS_ACT #define BF_I2C_STATUS_ACT_V(e) BF_I2C_STATUS_ACT(BV_I2C_STATUS_ACT__##e) #define BFM_I2C_STATUS_ACT_V(v) BM_I2C_STATUS_ACT #define REG_I2C_ENBST(_n1) jz_reg(I2C_ENBST(_n1)) #define JA_I2C_ENBST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x9c) #define JT_I2C_ENBST(_n1) JIO_32_RW #define JN_I2C_ENBST(_n1) I2C_ENBST #define JI_I2C_ENBST(_n1) (_n1) #define BP_I2C_ENBST_SLVRDLST 2 #define BM_I2C_ENBST_SLVRDLST 0x4 #define BF_I2C_ENBST_SLVRDLST(v) (((v) & 0x1) << 2) #define BFM_I2C_ENBST_SLVRDLST(v) BM_I2C_ENBST_SLVRDLST #define BF_I2C_ENBST_SLVRDLST_V(e) BF_I2C_ENBST_SLVRDLST(BV_I2C_ENBST_SLVRDLST__##e) #define BFM_I2C_ENBST_SLVRDLST_V(v) BM_I2C_ENBST_SLVRDLST #define BP_I2C_ENBST_SLVDISB 1 #define BM_I2C_ENBST_SLVDISB 0x2 #define BF_I2C_ENBST_SLVDISB(v) (((v) & 0x1) << 1) #define BFM_I2C_ENBST_SLVDISB(v) BM_I2C_ENBST_SLVDISB #define BF_I2C_ENBST_SLVDISB_V(e) BF_I2C_ENBST_SLVDISB(BV_I2C_ENBST_SLVDISB__##e) #define BFM_I2C_ENBST_SLVDISB_V(v) BM_I2C_ENBST_SLVDISB #define BP_I2C_ENBST_ACTIVE 0 #define BM_I2C_ENBST_ACTIVE 0x1 #define BF_I2C_ENBST_ACTIVE(v) (((v) & 0x1) << 0) #define BFM_I2C_ENBST_ACTIVE(v) BM_I2C_ENBST_ACTIVE #define BF_I2C_ENBST_ACTIVE_V(e) BF_I2C_ENBST_ACTIVE(BV_I2C_ENBST_ACTIVE__##e) #define BFM_I2C_ENBST_ACTIVE_V(v) BM_I2C_ENBST_ACTIVE #define REG_I2C_TAR(_n1) jz_reg(I2C_TAR(_n1)) #define JA_I2C_TAR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x4) #define JT_I2C_TAR(_n1) JIO_32_RW #define JN_I2C_TAR(_n1) I2C_TAR #define JI_I2C_TAR(_n1) (_n1) #define BP_I2C_TAR_ADDR 0 #define BM_I2C_TAR_ADDR 0x3ff #define BF_I2C_TAR_ADDR(v) (((v) & 0x3ff) << 0) #define BFM_I2C_TAR_ADDR(v) BM_I2C_TAR_ADDR #define BF_I2C_TAR_ADDR_V(e) BF_I2C_TAR_ADDR(BV_I2C_TAR_ADDR__##e) #define BFM_I2C_TAR_ADDR_V(v) BM_I2C_TAR_ADDR #define BP_I2C_TAR_10BITS 12 #define BM_I2C_TAR_10BITS 0x1000 #define BF_I2C_TAR_10BITS(v) (((v) & 0x1) << 12) #define BFM_I2C_TAR_10BITS(v) BM_I2C_TAR_10BITS #define BF_I2C_TAR_10BITS_V(e) BF_I2C_TAR_10BITS(BV_I2C_TAR_10BITS__##e) #define BFM_I2C_TAR_10BITS_V(v) BM_I2C_TAR_10BITS #define BP_I2C_TAR_SPECIAL 11 #define BM_I2C_TAR_SPECIAL 0x800 #define BF_I2C_TAR_SPECIAL(v) (((v) & 0x1) << 11) #define BFM_I2C_TAR_SPECIAL(v) BM_I2C_TAR_SPECIAL #define BF_I2C_TAR_SPECIAL_V(e) BF_I2C_TAR_SPECIAL(BV_I2C_TAR_SPECIAL__##e) #define BFM_I2C_TAR_SPECIAL_V(v) BM_I2C_TAR_SPECIAL #define BP_I2C_TAR_GC_OR_START 10 #define BM_I2C_TAR_GC_OR_START 0x400 #define BF_I2C_TAR_GC_OR_START(v) (((v) & 0x1) << 10) #define BFM_I2C_TAR_GC_OR_START(v) BM_I2C_TAR_GC_OR_START #define BF_I2C_TAR_GC_OR_START_V(e) BF_I2C_TAR_GC_OR_START(BV_I2C_TAR_GC_OR_START__##e) #define BFM_I2C_TAR_GC_OR_START_V(v) BM_I2C_TAR_GC_OR_START #define REG_I2C_SAR(_n1) jz_reg(I2C_SAR(_n1)) #define JA_I2C_SAR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x8) #define JT_I2C_SAR(_n1) JIO_32_RW #define JN_I2C_SAR(_n1) I2C_SAR #define JI_I2C_SAR(_n1) (_n1) #define REG_I2C_SHCNT(_n1) jz_reg(I2C_SHCNT(_n1)) #define JA_I2C_SHCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x14) #define JT_I2C_SHCNT(_n1) JIO_32_RW #define JN_I2C_SHCNT(_n1) I2C_SHCNT #define JI_I2C_SHCNT(_n1) (_n1) #define REG_I2C_SLCNT(_n1) jz_reg(I2C_SLCNT(_n1)) #define JA_I2C_SLCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x18) #define JT_I2C_SLCNT(_n1) JIO_32_RW #define JN_I2C_SLCNT(_n1) I2C_SLCNT #define JI_I2C_SLCNT(_n1) (_n1) #define REG_I2C_FHCNT(_n1) jz_reg(I2C_FHCNT(_n1)) #define JA_I2C_FHCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x1c) #define JT_I2C_FHCNT(_n1) JIO_32_RW #define JN_I2C_FHCNT(_n1) I2C_FHCNT #define JI_I2C_FHCNT(_n1) (_n1) #define REG_I2C_FLCNT(_n1) jz_reg(I2C_FLCNT(_n1)) #define JA_I2C_FLCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x20) #define JT_I2C_FLCNT(_n1) JIO_32_RW #define JN_I2C_FLCNT(_n1) I2C_FLCNT #define JI_I2C_FLCNT(_n1) (_n1) #define REG_I2C_RXTL(_n1) jz_reg(I2C_RXTL(_n1)) #define JA_I2C_RXTL(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x38) #define JT_I2C_RXTL(_n1) JIO_32_RW #define JN_I2C_RXTL(_n1) I2C_RXTL #define JI_I2C_RXTL(_n1) (_n1) #define REG_I2C_TXTL(_n1) jz_reg(I2C_TXTL(_n1)) #define JA_I2C_TXTL(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x3c) #define JT_I2C_TXTL(_n1) JIO_32_RW #define JN_I2C_TXTL(_n1) I2C_TXTL #define JI_I2C_TXTL(_n1) (_n1) #define REG_I2C_TXFLR(_n1) jz_reg(I2C_TXFLR(_n1)) #define JA_I2C_TXFLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x74) #define JT_I2C_TXFLR(_n1) JIO_32_RW #define JN_I2C_TXFLR(_n1) I2C_TXFLR #define JI_I2C_TXFLR(_n1) (_n1) #define REG_I2C_RXFLR(_n1) jz_reg(I2C_RXFLR(_n1)) #define JA_I2C_RXFLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x78) #define JT_I2C_RXFLR(_n1) JIO_32_RW #define JN_I2C_RXFLR(_n1) I2C_RXFLR #define JI_I2C_RXFLR(_n1) (_n1) #define REG_I2C_SDAHD(_n1) jz_reg(I2C_SDAHD(_n1)) #define JA_I2C_SDAHD(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x7c) #define JT_I2C_SDAHD(_n1) JIO_32_RW #define JN_I2C_SDAHD(_n1) I2C_SDAHD #define JI_I2C_SDAHD(_n1) (_n1) #define REG_I2C_ABTSRC(_n1) jz_reg(I2C_ABTSRC(_n1)) #define JA_I2C_ABTSRC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x80) #define JT_I2C_ABTSRC(_n1) JIO_32_RW #define JN_I2C_ABTSRC(_n1) I2C_ABTSRC #define JI_I2C_ABTSRC(_n1) (_n1) #define REG_I2C_DMACR(_n1) jz_reg(I2C_DMACR(_n1)) #define JA_I2C_DMACR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x88) #define JT_I2C_DMACR(_n1) JIO_32_RW #define JN_I2C_DMACR(_n1) I2C_DMACR #define JI_I2C_DMACR(_n1) (_n1) #define REG_I2C_DMATDLR(_n1) jz_reg(I2C_DMATDLR(_n1)) #define JA_I2C_DMATDLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x8c) #define JT_I2C_DMATDLR(_n1) JIO_32_RW #define JN_I2C_DMATDLR(_n1) I2C_DMATDLR #define JI_I2C_DMATDLR(_n1) (_n1) #define REG_I2C_DMARDLR(_n1) jz_reg(I2C_DMARDLR(_n1)) #define JA_I2C_DMARDLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x90) #define JT_I2C_DMARDLR(_n1) JIO_32_RW #define JN_I2C_DMARDLR(_n1) I2C_DMARDLR #define JI_I2C_DMARDLR(_n1) (_n1) #define REG_I2C_SDASU(_n1) jz_reg(I2C_SDASU(_n1)) #define JA_I2C_SDASU(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x94) #define JT_I2C_SDASU(_n1) JIO_32_RW #define JN_I2C_SDASU(_n1) I2C_SDASU #define JI_I2C_SDASU(_n1) (_n1) #define REG_I2C_ACKGC(_n1) jz_reg(I2C_ACKGC(_n1)) #define JA_I2C_ACKGC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x98) #define JT_I2C_ACKGC(_n1) JIO_32_RW #define JN_I2C_ACKGC(_n1) I2C_ACKGC #define JI_I2C_ACKGC(_n1) (_n1) #define REG_I2C_FLT(_n1) jz_reg(I2C_FLT(_n1)) #define JA_I2C_FLT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0xa0) #define JT_I2C_FLT(_n1) JIO_32_RW #define JN_I2C_FLT(_n1) I2C_FLT #define JI_I2C_FLT(_n1) (_n1) #define REG_I2C_CINT(_n1) jz_reg(I2C_CINT(_n1)) #define JA_I2C_CINT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x40) #define JT_I2C_CINT(_n1) JIO_32_RW #define JN_I2C_CINT(_n1) I2C_CINT #define JI_I2C_CINT(_n1) (_n1) #define REG_I2C_CRXUF(_n1) jz_reg(I2C_CRXUF(_n1)) #define JA_I2C_CRXUF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x44) #define JT_I2C_CRXUF(_n1) JIO_32_RW #define JN_I2C_CRXUF(_n1) I2C_CRXUF #define JI_I2C_CRXUF(_n1) (_n1) #define REG_I2C_CRXOF(_n1) jz_reg(I2C_CRXOF(_n1)) #define JA_I2C_CRXOF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x48) #define JT_I2C_CRXOF(_n1) JIO_32_RW #define JN_I2C_CRXOF(_n1) I2C_CRXOF #define JI_I2C_CRXOF(_n1) (_n1) #define REG_I2C_CTXOF(_n1) jz_reg(I2C_CTXOF(_n1)) #define JA_I2C_CTXOF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x4c) #define JT_I2C_CTXOF(_n1) JIO_32_RW #define JN_I2C_CTXOF(_n1) I2C_CTXOF #define JI_I2C_CTXOF(_n1) (_n1) #define REG_I2C_CRXREQ(_n1) jz_reg(I2C_CRXREQ(_n1)) #define JA_I2C_CRXREQ(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x50) #define JT_I2C_CRXREQ(_n1) JIO_32_RW #define JN_I2C_CRXREQ(_n1) I2C_CRXREQ #define JI_I2C_CRXREQ(_n1) (_n1) #define REG_I2C_CTXABT(_n1) jz_reg(I2C_CTXABT(_n1)) #define JA_I2C_CTXABT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x54) #define JT_I2C_CTXABT(_n1) JIO_32_RW #define JN_I2C_CTXABT(_n1) I2C_CTXABT #define JI_I2C_CTXABT(_n1) (_n1) #define REG_I2C_CRXDN(_n1) jz_reg(I2C_CRXDN(_n1)) #define JA_I2C_CRXDN(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x58) #define JT_I2C_CRXDN(_n1) JIO_32_RW #define JN_I2C_CRXDN(_n1) I2C_CRXDN #define JI_I2C_CRXDN(_n1) (_n1) #define REG_I2C_CACT(_n1) jz_reg(I2C_CACT(_n1)) #define JA_I2C_CACT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x5c) #define JT_I2C_CACT(_n1) JIO_32_RW #define JN_I2C_CACT(_n1) I2C_CACT #define JI_I2C_CACT(_n1) (_n1) #define REG_I2C_CSTP(_n1) jz_reg(I2C_CSTP(_n1)) #define JA_I2C_CSTP(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x60) #define JT_I2C_CSTP(_n1) JIO_32_RW #define JN_I2C_CSTP(_n1) I2C_CSTP #define JI_I2C_CSTP(_n1) (_n1) #define REG_I2C_CSTT(_n1) jz_reg(I2C_CSTT(_n1)) #define JA_I2C_CSTT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x64) #define JT_I2C_CSTT(_n1) JIO_32_RW #define JN_I2C_CSTT(_n1) I2C_CSTT #define JI_I2C_CSTT(_n1) (_n1) #define REG_I2C_CGC(_n1) jz_reg(I2C_CGC(_n1)) #define JA_I2C_CGC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x68) #define JT_I2C_CGC(_n1) JIO_32_RW #define JN_I2C_CGC(_n1) I2C_CGC #define JI_I2C_CGC(_n1) (_n1) #endif /* __HEADERGEN_I2C_H__*/